发布 Mar 30, 2023 80 查看
Job Responsibilities
1. Engage in the development of SOC / low power consumption / AI / Risc-V and other related modules;
2. Determine the design plan based on the project requirements, and be responsible for RTL implementation;
3. Assist EDA verification;
4. Participate in FPGA verification;
5. Module-level timing constraints, synthesis, STA check, etc.;
6. Write documents and assist in software debugging.
Job requirements
1. Master degree or above, major in microelectronics/electronic engineering/communication engineering, etc.;
2. Have a solid foundation of digital circuit theories and be proficient in Verilog language;
3. Proficiency in ASIC design flow and EDA tools;
4. Design experience in one of the following areas is preferred: CPU, AI, Cache, bus, DMA, interface peripherals, low power consumption, audio and video processing, etc.
5. Working Proficiency in English.
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